4 BIT SYNCHRONOUS DOWN COUNTER
4 BIT SYNCHRONOUS DOWN COUNTER
Down counter counts the numbers in decreasing order. This is similar to an up counter but is should decrease its count. So inputs of JK flip- flop are connected to the inverted Q (Q’) .The 4 bit down counter shown in below diagram is designed by using JK flip flop. The same external clock pulse is connected to all the flip flops.
As the counter has to count down the sequence, initially all the inputs will be in high state as they have to count down the sequence. It will start with 1111 and ends with 0000, similar to the up counter.
In the down counter it should be remembered that, preceding flip flop will toggles only if front flip flop produces low logic at its output.
